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Publications (DBLP list, Google Scholar Citations)

PhD Thesis:

Thomas C.P. Chau, "Optimising Reconfigurable Systems for Real-time Applications," 2015. [pdf]

Book Chapters:

[1] Thomas Chau, Pavel Burovskiy, Michael Flynn and Wayne Luk, “Advances in Dataflow Systems,” In Ali R. Hurson, Veljko Milutinović, editors: Advances in Computers, Vol 106, ADCOM, UK: Academic Press, 2017, pp. 21-62.

Journal Articles:

[1] Xinyu Niu, Thomas C.P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu and Oliver Pell, "Automating Elimination of Idle Functions by Runtime Reconfiguration," ACM Transactions on Reconfigurable Technology and Systems, vol. 8, no. 3, 2015.

[2] Thomas C.P. Chau, Xinyu Niu, Alison Eele, Jan Maciejowski, Peter Y.K. Cheung and Wayne Luk, "Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems," ACM Transactions on Reconfigurable Technology and Systems, vol. 7, no. 4, 2015. [pdf]

[3] Ka-Wai Kwok, Gary C.T. Chow, Thomas C.P. Chau, Yue Chen, Shelley H. Zhang, Wayne Luk, Ehud J. Schmidt, Zion T.H. Tse, "FPGA-based Acceleration of MRI Registration: An Enabling Technique for Improving MRI-guided Cardiac Therapy," Journal of Cardiovascular Magnetic Resonance, vol. 16, Suppl 1, pp. W11, 2014. [pdf]

[4] Ka-Wai Kwok, Yue Chen, Thomas C.P. Chau, Wayne Luk, Kent R. Nilsson, Ehud J. Schmidt, Zion T.H. Tse, "MRI-based Visual and Haptic Catheter Feedback: Simulating a Novel System's Contribution to Efficient and Safe MRI-guided Cardiac Electrophysiology Procedures," Journal of Cardiovascular Magnetic Resonance, vol. 16, Suppl 1, pp. W11, 2014. [pdf]

[5] Thomas C.P. Chau, James Targett, Marlon Wijeyasinghe, Wayne Luk, Peter Y.K. Cheung, Benjamin Cope, Alison Eele and Jan Maciejowski, "Accelerating Sequential Monte Carlo Method for Real-time Air Traffic Management," ACM SIGARCH Computer Architecture News, vol. 41, no. 5, pp. 35-40, 2013. [pdf]

[6] Man-Ho Ho, Yan-Qing Ai, Thomas C.P. Chau, Steve C.L. Yuen, Chiu-Sing Choy, Philip H.W. Leong and Kong-Pang Pun, "Architecture and Design Flow for a Highly Efficient Structured ASIC," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 3, pp. 424-433, 2013. [pdf]

[7] Thomas C.P. Chau, Wayne Luk and Peter Y.K. Cheung, "Roberts: Reconfigurable Platform for Benchmarking Real-time Systems," ACM SIGARCH Computer Architecture News, vol. 40, no. 5, pp. 10-15, 2012. [pdf]

Conference papers:

[1] Paolo Romano, Thomas Chau, Ben Jeppesen, Mario Paolone, Elias Ahmed, "A high-performance, low-cost PMU prototype for distribution networks based on FPGA," in Proc. PES PowerTech Conference, to appear.

[2] Ben Jeppesen, Andrew Crosland, Thomas Chau, "An FPGA-based platform for integrated power and motion control," in Proc. Annual Conference of IEEE Industrial Electronics Society (IECON), 2016.

[3] Rocco Morello, Federico Baronti, Xiang Tian, Thomas Chau, Roberto Di Rienzo, Roberto Roncella, Ben Jeppesen, Will H. Lee, Tak Ikushima, Roberto Saletti, "Hardware-in-the-Loop Simulation of FPGA-based State Estimators for Electric Vehicle Batteries," in Proc. International Symposium on Industrial Electronics (ISIE), 2016.

[4] Shengjia Shao, Liucheng Guo, Ce Guo, Thomas C. P. Chau, David B. Thomas, Wayne Luk, Stephen Weston, "Recursive pipelined genetic propagation for bilevel optimisation," in Proc. International Conference on Field Programmable Logic and Applications (FPL), pp. 1-6, 2015.

[5] Thomas C.P. Chau, Maciej Kurek, James Stanley Targett, Jake Humphrey, Georgios Skouroupathis, Alison Eele, Jan Maciejowski, Benjamin Cope, Kathryn Cobden, Philip Leong, Peter Y.K. Cheung and Wayne Luk, "SMCGen: Generating Reconfigurable Design for Sequential Monte Carlo Applications," in Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 141-148, 2014. [pdf]

[6] Maciej Kurek, Tobias Becker, Thomas C.P. Chau and Wayne Luk, "Automating Optimization of Reconfigurable Designs," in Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 201-213, 2014. [pdf]

[7] Thomas C.P. Chau, Ka-Wai Kwok, Gary C.T. Chow, Kuen Hung Tsoi, Zion Tse, Peter Y.K. Cheung and Wayne Luk, "Acceleration of Real-time Proximity Query for Dynamic Active Constraints," in Proc. International Conference on Field-Programmable Technology (FPT), pp. 206-213, 2013. [pdf]

[8] Alison Eele, Jan Maciejowski, Thomas C.P. Chau and Wayne Luk, "Parallelisation of Sequential Monte Carlo for Real-Time Control in Air Traffic Management," in Proc. IEEE Conference on Decision and Control, 2013. [pdf]

[9] Alison Eele, Jan Maciejowski, Thomas C.P. Chau and Wayne Luk, "Control of Aircraft in the Terminal Manoeuvring Area using Parallelised Sequential Monte Carlo," in Proc. AIAA Conference on Guidance, Navigation, and Control, 2013. [pdf]

[10] Thomas C.P. Chau, James Targett, Marlon Wijeyasinghe, Wayne Luk, Peter Y.K. Cheung, Benjamin Cope, Alison Eele and Jan Maciejowski, "Accelerating Sequential Monte Carlo Method for Real-time Air Traffic Management," in Proc. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2013. Best Paper Award Candidate. [pdf]

[11] Xinyu Niu, Thomas C.P. Chau, Qiwei Jin, Wayne Luk and Qiang Liu, "Automating Elimination of Idle Functions by Run-Time Reconfiguration," in Proc. International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 97-104, 2013. [pdf]

[12] Thomas C.P. Chau, Xinyu Niu, Alison Eele, Wayne Luk, Peter Y.K. Cheung and Jan Maciejowski, "Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications," in Proc. International Symposium on Applied Reconfigurable Computing (ARC), pp. 1-12, 2013. [pdf]

[13] Xinyu Niu, Thomas C.P. Chau, Qiwei Jin, Wayne Luk and Qiang Liu, "Automating Resource Optimisation in Reconfigurable Design," in Proc. International Symposium on Field Programmable Gate Arrays (FPGA), pp. 275, 2013.

[14] Thomas C.P. Chau, Wayne Luk, Peter Y.K. Cheung, Alison Eele and Jan Maciejowski, "Adaptive Sequential Monte Carlo Approach for Real-time Applications," in Proc. International Conference on Field Programmable Logic and Applications (FPL), pp. 527-530, 2012. [pdf]

[15] Thomas C.P. Chau, Wayne Luk and Peter Y.K. Cheung, "Roberts: Reconfigurable Platform for Benchmarking Real-time Systems," in Proc. International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2012. Best Paper Award Candidate. [pdf]

[16] Sam M.H. Ho, Steve C.L. Yuen, Hiu Ching Poon, Thomas C.P. Chau, Yan-Qing Ai, Philip H.W. Leong, Oliver C.S. Choy and Kong-Pang Pun, "Structured ASIC:Methodology and Comparison," in Proc. International Conference on Field-Programmable Technology (FPT), pp. 377-380, 2010. [pdf]

[17] Thomas C.P. Chau, David W.L. Wu, Yan-Qing Ai, Brian P.W. Chan, Sam M.H. Ho, Oscar K.L. Lau, Kong-Pang Pun, Oliver C.S. Choy, Philip H.W. Leong, "Design of a Single Layer Programmable Structured ASIC Library," in Proc. International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 32-35, 2010. [pdf]

[18] Steve C.L. Yuen, Yan-Qing Ai, Brian P.W. Chan, Thomas C.P. Chau, Sam M.H. Ho, Oscar K.L. Lau, Kong-Pang Pun, Philip H.W. Leong, Oliver C.S. Choy, "Rapid Prototyping on a Structured ASIC Fabric," in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 379 - 380, 2010. [pdf]

[19] Eddie Hung, Steve Wilton, Haile Yu, Thomas C.P. Chau, and Philip H.W. Leong, "A Detailed Delay Path Model for FPGAs," in Proc. International Conference on Field Programmable Technology (FPT), pp. 96-103, 2009. [pdf]

[20] Thomas C.P. Chau, Sam M.H. Ho, Philip H.W. Leong, Peter Zipf, and Manfred Glesner, "Generation of Synthetic Floating-point Benchmark Circuits," in Proc. International Symposium on Parallel and Distributed Processing (IPDPS), pp. 1-9, 2009. [pdf]

[21] Thomas C.P. Chau, Philip H.W. Leong, Sam M.H. Ho, Brian P.W. Chan, Steve C.L. Yuen, Kong-Pang Pun, Oliver C.S. Choy, and Xinan Wang, "A Comparison of Via-programmable Gate Array Logic Cell Circuits," in Proc. International Symposium on Field-Programmable Gate Arrays (FPGA), pp. 53-61, 2009. [pdf]

White papers:

[1] Thomas Chau, Ben Jeppesen, Kevin Smith, Andrew Crosland, and Stefano J. Zammattio, "Motor Control Designs with an Integrated FPGA Design Flow," Altera white paper, 2016. [pdf]